1. Field of the Invention
The present invention relates to high density memory devices based on programmable resistive materials, including phase change materials like chalcogenides, and to methods for manufacturing such devices.
2. Description of Related Art
Phase change based memory materials are widely used in nonvolatile random access memory cells. Such materials, such as chalcogenides and similar materials, can be caused to change phase between an amorphous state and a crystalline state by application of electrical current at levels suitable for implementation in integrated circuits. The generally amorphous state is characterized by higher resistivity than the generally crystalline state, which can be readily sensed to indicate data.
The change from the amorphous to the crystalline state is generally a low current operation. The change from crystalline to amorphous, referred to as reset herein, is generally a higher current operation, which includes a short high current density pulse to melt or breakdown the crystalline structure, after which the phase change material cools quickly, quenching the phase change process, allowing at least a portion of the phase change structure to stabilize in the amorphous state. It is desirable to minimize the magnitude of the reset current used to cause transition of phase change material from a crystalline state to amorphous state. The magnitude of the needed reset current can be reduced by reducing the size of the phase change material element in the cell and by reducing the size of the contact area between electrodes and the phase change material, so that higher current densities are achieved with small absolute current values through the phase change material element.
One problem associated with phase change memory devices arises because the magnitude of the current required for reset operations depends on the volume of phase change material that must change phase. Thus, cells made using standard integrated circuit manufacturing processes have been limited by the minimum feature size of manufacturing equipment. Additionally, variations in the critical dimensions of the memory cells are typically dependent upon the variations in the standard lithographic processes used to form the memory cells. Therefore, techniques to provide sublithographic dimensions for the memory cells must be developed, which can lack uniformity or reliability needed for large scale, high density memory devices.
Accordingly, an opportunity arises to devise methods and structures that form memory cells that have small active regions of programmable resistive material using reliable and repeatable manufacturing methods. Furthermore, it is desirable to produce memory devices having small variations in critical dimensions across an array of memory cells.